* c:\users\pratyusha\esim-workspace\flashadc\flashadc.cir

.include lm_741.sub
.include D.lib
r2  net-_r1-pad2_ net-_r2-pad2_ 1k
r1  +5v net-_r1-pad2_ 1k
r4  net-_r3-pad2_ net-_r4-pad2_ 1k
r3  net-_r2-pad2_ net-_r3-pad2_ 1k
r6  net-_r5-pad2_ net-_r6-pad2_ 1k
r5  net-_r4-pad2_ net-_r5-pad2_ 1k
r7  net-_r7-pad1_ net-_r6-pad2_ 1k
r8  gnd net-_r7-pad1_ 1k
x2 ? net-_r2-pad2_ input gnd ? net-_u10-pad1_ net-_x1-pad7_ ? lm_741
x3 ? net-_r3-pad2_ input gnd ? net-_u11-pad1_ net-_x1-pad7_ ? lm_741
x6 ? net-_r4-pad2_ input gnd ? net-_u12-pad1_ net-_x1-pad7_ ? lm_741
x7 ? net-_r5-pad2_ input gnd ? net-_u13-pad1_ net-_x1-pad7_ ? lm_741
x5 ? net-_r7-pad1_ input gnd ? net-_u15-pad1_ net-_x1-pad7_ ? lm_741
x1 ? net-_r1-pad2_ input gnd ? net-_u9-pad1_ net-_x1-pad7_ ? lm_741
x4 ? net-_r6-pad2_ input gnd ? net-_u14-pad1_ net-_x1-pad7_ ? lm_741
v1 net-_x1-pad7_ gnd  dc 15
v2  gnd input pwl(0 1 10 2 20 3 22 3 100 10 110 11)
* u1  input plot_v1
* u10  net-_u10-pad1_ net-_u10-pad2_ adc_bridge_1
* u9  net-_u9-pad1_ net-_u2-pad2_ adc_bridge_1
* u11  net-_u11-pad1_ net-_u11-pad2_ adc_bridge_1
* u12  net-_u12-pad1_ net-_u12-pad2_ adc_bridge_1
* u13  net-_u13-pad1_ net-_u13-pad2_ adc_bridge_1
* u14  net-_u14-pad1_ net-_u14-pad2_ adc_bridge_1
* u15  net-_u15-pad1_ net-_u15-pad2_ adc_bridge_1
* u2  gnd net-_u2-pad2_ net-_u16-pad1_ pratyusha_flashadc
* u3  net-_u2-pad2_ net-_u10-pad2_ net-_u17-pad1_ pratyusha_flashadc
* u4  net-_u10-pad2_ net-_u11-pad2_ net-_u18-pad1_ pratyusha_flashadc
* u5  net-_u11-pad2_ net-_u12-pad2_ net-_u19-pad1_ pratyusha_flashadc
* u6  net-_u12-pad2_ net-_u13-pad2_ net-_u20-pad1_ pratyusha_flashadc
* u7  net-_u13-pad2_ net-_u14-pad2_ net-_u21-pad1_ pratyusha_flashadc
* u8  net-_u14-pad2_ net-_u15-pad2_ net-_u22-pad1_ pratyusha_flashadc
* u16  net-_u16-pad1_ net-_d1-pad1_ dac_bridge_1
* u17  net-_u17-pad1_ net-_d4-pad1_ dac_bridge_1
* u18  net-_u18-pad1_ net-_d6-pad1_ dac_bridge_1
* u19  net-_u19-pad1_ net-_d8-pad1_ dac_bridge_1
* u20  net-_u20-pad1_ net-_d10-pad1_ dac_bridge_1
* u21  net-_u21-pad1_ net-_d11-pad1_ dac_bridge_1
* u22  net-_u22-pad1_ net-_d12-pad1_ dac_bridge_1
d3 net-_d1-pad1_ v_out1 1N4148
d2 net-_d1-pad1_ v_out2 1N4148
d1 net-_d1-pad1_ v_out3 1N4148
d5 net-_d4-pad1_ v_out2 1N4148
d4 net-_d4-pad1_ v_out3 1N4148
d7 net-_d6-pad1_ v_out1 1N4148
d6 net-_d6-pad1_ v_out3 1N4148
d8 net-_d8-pad1_ v_out3 1N4148
d10 net-_d10-pad1_ v_out1 1N4148
d9 net-_d10-pad1_ v_out2 1N4148
d11 net-_d11-pad1_ v_out2 1N4148
d12 net-_d12-pad1_ v_out1 1N4148
r11  gnd v_out1_1k
r10  gnd v_out2_1k
r9  gnd v_out3_1k
* u25  v_out1 plot_v1
* u24  v_out2 plot_v1
* u23  v_out3 plot_v1
a1 [net-_u10-pad1_ ] [net-_u10-pad2_ ] u10
a2 [net-_u9-pad1_ ] [net-_u2-pad2_ ] u9
a3 [net-_u11-pad1_ ] [net-_u11-pad2_ ] u11
a4 [net-_u12-pad1_ ] [net-_u12-pad2_ ] u12
a5 [net-_u13-pad1_ ] [net-_u13-pad2_ ] u13
a6 [net-_u14-pad1_ ] [net-_u14-pad2_ ] u14
a7 [net-_u15-pad1_ ] [net-_u15-pad2_ ] u15
a8 [gnd ] [net-_u2-pad2_ ] [net-_u16-pad1_ ] u2
a9 [net-_u2-pad2_ ] [net-_u10-pad2_ ] [net-_u17-pad1_ ] u3
a10 [net-_u10-pad2_ ] [net-_u11-pad2_ ] [net-_u18-pad1_ ] u4
a11 [net-_u11-pad2_ ] [net-_u12-pad2_ ] [net-_u19-pad1_ ] u5
a12 [net-_u12-pad2_ ] [net-_u13-pad2_ ] [net-_u20-pad1_ ] u6
a13 [net-_u13-pad2_ ] [net-_u14-pad2_ ] [net-_u21-pad1_ ] u7
a14 [net-_u14-pad2_ ] [net-_u15-pad2_ ] [net-_u22-pad1_ ] u8
a15 [net-_u16-pad1_ ] [net-_d1-pad1_ ] u16
a16 [net-_u17-pad1_ ] [net-_d4-pad1_ ] u17
a17 [net-_u18-pad1_ ] [net-_d6-pad1_ ] u18
a18 [net-_u19-pad1_ ] [net-_d8-pad1_ ] u19
a19 [net-_u20-pad1_ ] [net-_d10-pad1_ ] u20
a20 [net-_u21-pad1_ ] [net-_d11-pad1_ ] u21
a21 [net-_u22-pad1_ ] [net-_d12-pad1_ ] u22
* Schematic Name:                             adc_bridge_1, NgSpice Name: adc_bridge
.model u10 adc_bridge(in_low=1.0 in_high=2.0 rise_delay=1.0e-9 fall_delay=1.0e-9 ) 
* Schematic Name:                             adc_bridge_1, NgSpice Name: adc_bridge
.model u9 adc_bridge(in_low=1.0 in_high=2.0 rise_delay=1.0e-9 fall_delay=1.0e-9 ) 
* Schematic Name:                             adc_bridge_1, NgSpice Name: adc_bridge
.model u11 adc_bridge(in_low=1.0 in_high=2.0 rise_delay=1.0e-9 fall_delay=1.0e-9 ) 
* Schematic Name:                             adc_bridge_1, NgSpice Name: adc_bridge
.model u12 adc_bridge(in_low=1.0 in_high=2.0 rise_delay=1.0e-9 fall_delay=1.0e-9 ) 
* Schematic Name:                             adc_bridge_1, NgSpice Name: adc_bridge
.model u13 adc_bridge(in_low=1.0 in_high=2.0 rise_delay=1.0e-9 fall_delay=1.0e-9 ) 
* Schematic Name:                             adc_bridge_1, NgSpice Name: adc_bridge
.model u14 adc_bridge(in_low=1.0 in_high=2.0 rise_delay=1.0e-9 fall_delay=1.0e-9 ) 
* Schematic Name:                             adc_bridge_1, NgSpice Name: adc_bridge
.model u15 adc_bridge(in_low=1.0 in_high=2.0 rise_delay=1.0e-9 fall_delay=1.0e-9 ) 
* Schematic Name:                             pratyusha_flashadc, NgSpice Name: pratyusha_flashadc
.model u2 pratyusha_flashadc(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 instance_id=1 ) 
* Schematic Name:                             pratyusha_flashadc, NgSpice Name: pratyusha_flashadc
.model u3 pratyusha_flashadc(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 instance_id=1 ) 
* Schematic Name:                             pratyusha_flashadc, NgSpice Name: pratyusha_flashadc
.model u4 pratyusha_flashadc(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 instance_id=1 ) 
* Schematic Name:                             pratyusha_flashadc, NgSpice Name: pratyusha_flashadc
.model u5 pratyusha_flashadc(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 instance_id=1 ) 
* Schematic Name:                             pratyusha_flashadc, NgSpice Name: pratyusha_flashadc
.model u6 pratyusha_flashadc(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 instance_id=1 ) 
* Schematic Name:                             pratyusha_flashadc, NgSpice Name: pratyusha_flashadc
.model u7 pratyusha_flashadc(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 instance_id=1 ) 
* Schematic Name:                             pratyusha_flashadc, NgSpice Name: pratyusha_flashadc
.model u8 pratyusha_flashadc(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 instance_id=1 ) 
* Schematic Name:                             dac_bridge_1, NgSpice Name: dac_bridge
.model u16 dac_bridge(out_low=0.0 out_high=5.0 out_undef=0.5 input_load=1.0e-12 t_rise=1.0e-9 t_fall=1.0e-9 ) 
* Schematic Name:                             dac_bridge_1, NgSpice Name: dac_bridge
.model u17 dac_bridge(out_low=0.0 out_high=5.0 out_undef=0.5 input_load=1.0e-12 t_rise=1.0e-9 t_fall=1.0e-9 ) 
* Schematic Name:                             dac_bridge_1, NgSpice Name: dac_bridge
.model u18 dac_bridge(out_low=0.0 out_high=5.0 out_undef=0.5 input_load=1.0e-12 t_rise=1.0e-9 t_fall=1.0e-9 ) 
* Schematic Name:                             dac_bridge_1, NgSpice Name: dac_bridge
.model u19 dac_bridge(out_low=0.0 out_high=5.0 out_undef=0.5 input_load=1.0e-12 t_rise=1.0e-9 t_fall=1.0e-9 ) 
* Schematic Name:                             dac_bridge_1, NgSpice Name: dac_bridge
.model u20 dac_bridge(out_low=0.0 out_high=5.0 out_undef=0.5 input_load=1.0e-12 t_rise=1.0e-9 t_fall=1.0e-9 ) 
* Schematic Name:                             dac_bridge_1, NgSpice Name: dac_bridge
.model u21 dac_bridge(out_low=0.0 out_high=5.0 out_undef=0.5 input_load=1.0e-12 t_rise=1.0e-9 t_fall=1.0e-9 ) 
* Schematic Name:                             dac_bridge_1, NgSpice Name: dac_bridge
.model u22 dac_bridge(out_low=0.0 out_high=5.0 out_undef=0.5 input_load=1.0e-12 t_rise=1.0e-9 t_fall=1.0e-9 ) 
.tran 0.1e-00 20e-00 0e-00

* Control Statements 
.control
run
print allv > plot_data_v.txt
print alli > plot_data_i.txt
plot v(input) v(v_out1)+6 v(v_out2)+12 v(v_out3)
.endc
.end